HomeElectronicsEasy, excessive accuracy/precision/decision frequency counter

Easy, excessive accuracy/precision/decision frequency counter

In my earlier design thought, a design for a easy GPS disciplined oscillator (GPSDO) 10 MHz reference was offered. A be aware on the finish of that article describes the conclusion {that a} frequency counter may very well be derived by easy modifications to the circuit. This text follows up by presenting a easy circuit for a frequency counter derived from the GPSDO schematic.

As proven in Determine 1, we reuse a lot of the earlier design together with the ability provide, Arduino Nano, 32-bit counter, LCD, and LEDs. Nevertheless, we take away the VCXO circuitry. We add a second pushbutton, enter sign conditioning, and create totally different outputs. Many components of the software program can even be saved or barely modified. 

Determine 1 Primary block diagram of the GPS enabled frequency counter.

Determine 2 exhibits the detailed design of the frequency counter. Evaluating this schematic to the earlier GPSDO schematic, you’ll be able to see the modifications. Together with the elimination of the VCXO circuitry, you will notice that the 74LS139 has been eliminated. The frequency counter design freed up some I/O ports so I didn’t want so as to add an expander to deal with the counter (74LV8154).

Determine 2 Schematic of the frequency counter.

You’ll additionally discover the addition of an analog conditioning circuit feeding the enter of the counter. To maintain the design easy, solely a Schmitt set off inverter, a cap, and a few resistors are used. This can be a well-known circuit courting at the very least again to the 1975 Fairchild software be aware 140. The circuit makes use of 2 resistors (R6 and R7) to bias the Schmitt set off inverter to its center-point (this works as a result of the enter is AC coupled through C17). Biasing to the center-point positions means the enter sign facilities on the Schmitt set off’s hysteresis. This provides the enter sign most sensitivity. The capacitor and resistors are chosen to permit indicators from a bit over 10 mHz to 80 MHz to go to the Schmitt inverter. The 80 MHz max was recognized on account of some preliminary testing of the circuit. The restrict is imposed by the 74LV8154 counter as this seems to be its most counting fee (the datasheet is considerably unclear on this quantity). The ten mHz minimal is due a design resolution to have a most gate time of 100 seconds. With a gate time of 100 seconds, the minimal of 1 depend will happen if the enter sign has a frequency of 1/100, or 10 mHz. (Gate instances 1 second and 10 seconds are additionally out there through the “Gate Time” pushbutton.)

The GPSDO used a push button and was learn by an ADC on the Arduino Nano (Determine 3). This frequency counter design makes use of 2 pushbuttons which might be related to analog comparators to learn their states.

Determine 3 Accomplished frequency counter in 3D printed enclosure with LCD.

So, after the sign is squared up through the Schmitt set off, the squared-up sign is distributed to the 32-bit counter. To measure the frequency of this sign, the Arduino Nano waits for an interrupt from the 1 pulse-per-second (1PPS) sign from the GPS module (~$10). Even a cheap GPS module can ship a really correct 1PPS sign. This pulse seems to be like a ~100 ms pulse each second. After receiving this interrupt, the code indicators the 74LV8154 to clear the counter. The code then waits for the subsequent 1PPS interrupt and, when obtained, the Nano indicators the counter to latch the present depend into its on-chip register after which clears the counter. The code now reads within the latched-in register information. This can be a description of a 1 second gate time operation, so the register worth is the frequency of the enter sign. If a ten second or a 100 second gate time is chosen, by utilizing the “Gate Time” pushbutton, the code waits for 10 or 100 1PPS interrupts earlier than latching within the depend. The depend is then scaled by 10 or 100 to get the frequency.

Extra on the firmware; the 2 tasks are literally fairly related and share loads of code. We nonetheless drive the LCD and LEDs, monitor lack of the 1PPS sign through a 2 second watchdog timer (WDT), depend pulses and, upon a 1PPS interrupt, learn the register within the 74LV8154, and so forth. One massive change is that we now not want to regulate PWMs as they don’t seem to be used on this design. This reduces the complexity of the code and saves RAM.

Because the code for the Nano was derived from the GPSDO code, it’s once more written in C utilizing the Arduino IDE. The frequency counter code is principally pushed by the 1PPS interrupt. When a 1PPS interrupt happens,  the interrupt service routine responds by locking within the 32-bit counter, clearing the counter, and setting a reset flag. The piece of code that locks within the present depend onto an onboard register within the 74LC8154 after which clears the depend to zero, takes some finite time between locking in and clearing. This implies we miss some counts. I discuss with this time because the latency. The firmware compensates for this latency by including an offset worth to the uncooked counter worth. It turns on the market 16 lacking counts. (The earlier GPSDO article explains how the 16 depend latency offset was verified.)  Within the working code, the lacking 16 depend is added again in on each learn of the counter.

Let’s check out efficiency. First, Determine 4 exhibits the minimal sign versus frequency.

Determine 4 Graph of the minimal sign versus frequency.

The minimal is usually lower than 1 Vpp besides at frequencies beneath 1 Hz the place the sine wave minimal climbs. The utmost enter voltage is 5 Vpp. As for precision, it sometimes reads frequency with a normal deviation 0.01 Hz (with 100 second gate time). Determine 5 exhibits the LCD pages for 100 second gate time with 10 MHz enter sign.

Determine 5 Statistics on LCD with 100 second gate time with 10 MHz enter sign.

On the GPSDO challenge, there was a web page exhibiting a histogram of the readings. This labored for that challenge because the frequency and the vary of the frequency was identified a priori, whereas on this frequency counter challenge there isn’t a info on the frequency or the vary of frequencies to show. Provided that, the quantity of RAM to retailer earlier readings wanted is proscribed, in order that function was eliminated.

(A be aware on normal deviation: engineers oftentimes assume normal deviation implies a standard distribution. That isn’t true. An ordinary deviation calculation doesn’t assume any explicit distribution.  On this explicit case, the deviation I sometimes see is a distribution skewed to at least one facet—not a standard distribution.)

To keep away from struggling the wrath of my outdated physics 101 professor, care was taken to show information utilizing mathematically right important digits. Freq, 1/f (interval), Fmean, and Fstd conform (principally) with normal mathematical guidelines for important digits as primarily based on the measured frequency and gate time. For instance, after taking 100 readings, Fmean will show an extra digit after the decimal place. There’s an exception to the conformity of serious digits. That’s, the 1/f (interval) displayed when measuring low frequencies…below 10 Hz. An instance of the exception: when utilizing an enter sign of 6 Hz and a 1 second gate time, the interval (1/f) will show 167 ms and never 100 ms as dictated by the principles for important digits. This appears like it might be much less complicated to the person.

Vigilant readers might have noticed a seemingly inconsistent design challenge. I beforehand said that there are gate instances of 1, 10, and 100 seconds. I additionally said the design is able to studying as much as 80 MHz utilizing the 32-bit counter. So, what occurs once we take a studying of an 80 MHz sign utilizing a gate time of 100 seconds? The counter ought to learn 8,000,000,000 after 100 seconds however we’re utilizing a 32-bit counter. A 32-bit counter will solely depend as much as 4,294,967,295 (232-1). To beat this challenge, the code will get a counter studying (with out resetting the counter) snapshot at 50 seconds and saves this because the intermediate studying. Then, when the ultimate counter studying is taken at 100 seconds, it’s in comparison with the intermediate studying. If the ultimate studying is smaller than the intermediate studying, we all know there was a rollover within the counter. On this case, the code will add 232 to the intermediate studying to get a real counter studying. This methodology offers us probably the most accuracy as we don’t have to take 50 second readings and add them collectively, thereby avoiding a counter clear operation and a second offset correction.

All-in-all this frequency counter performs fairly nicely, is easy, requires no calibration, offers good details about the related sign, and suits properly on my bench.

Full challenge info for this may be discovered at, the open-source web site: https://www.thingiverse.com/factor:5180568 (or you’ll be able to search thingiverse.com for “DamianB2”).

Undertaking info contains full KiCad challenge with schematic, PCB, and PCBA BOM.  Additionally included is a full meeting BOM, Arduino supply code, 3D print information for the enclosure, hyperlink to 3D print information for the GPS module enclosure, paintings for the nameplates, varied notes, and so forth.

Damian Bonicatto is a consulting engineer with many years of expertise in embedded {hardware}, firmware and system design. He holds 30 patents.

Phoenix Bonicatto is a contract author.

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